Connecting the analogue world to RS EDP

Analogue Input Module: Setting up the Anti-Aliasing filter

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Before the considering the analogue input to a digital system, the designer must have available a certain amount of numerical data:

- The maximum frequency component of the analogue signal
- The Dynamic Range of the analogue signal (ratio of the maximum to the minimum input signal level)
- The required Signal-to-Noise ratio of the digitised signal

The first point is what concerns us here when deciding on the cut-off frequency of the input analogue low-pass-filter.

Decide on the sampling rate

The sampling rate is set according to the Nyquist criterion which states that it must be at least twice that of the maximum frequency component present in the analogue signal. This ensures accurate reproduction of the signal, but a much higher rate will ease the design of a vital circuit that precedes the ADC: the Anti-Aliasing filter.

Design considerations for the anti-aliasing filter

The frequency plots in Fig.1 provide a graphical representation of aliasing. In this example we are going to sample a signal which has a maximum frequency component of fmax (the band in green) using a sampling frequency of fs. The plot on the left shows all the new frequencies present in the non-aliased sampled signal. Note that we now have new bands of frequencies (in blue) each with a width of 2 x fmax and centred on the sampling frequency ƒs and its harmonics. This is a correctly sampled signal because fs > 2 x fmax. By contrast the plot on the right shows extensive aliasing where the various bands overlap leading to the production of erroneous frequencies in the green baseband.

The practical problem is that few ‘raw’ signals have a nice, clean fmax. In order to avoid aliased components being produced, a lowpass anti-aliasing filter needs to be placed in circuit before the ADC.

Fig.2 shows the trade-off between sampling rate and the order of the low-pass filter. The designer can massively over-sample and then use a simple low-order filter or select a lower rate and then be faced with the need for a complex multi-pole type. However the ability of the DSP device to process the algorithm between consecutive samples must be considered before the sampling rate is set. It can save a lot of trouble later if the DSP program is tested and timed on a suitable development system before the sampling rate is fixed and the filter designed.

Anti-aliasing filters on the analogue input module (EDP-AM-AN16)

Sallen-Key filters are used on the Analogue Input module which provides filter circuits for up to 16 input channels. Eight have simple passive 1-pole filters, six have fixed cut-off (12kHz) 2-pole Sallen-Key filters with a roll-off of -40dB/decade and two have 2-pole filters whose cut-off frequency can be set by digital potentiometers. These two filters on channels AN0 and AN1 can be cascaded by means of a solder-link to provide a single 4-pole filter on AN0 with -80dB/decade roll-off.

Programming the Digital Potentiometers

The potentiometers are programmed from an I2C serial bus with two allocated to each filter controlling the resistive components which set the cut-off frequency. Advantage is taken of a simplification of the Sallen-Key filter which occurs when the two resistances and two capacitances are in the ratio 2 to 1.

In the next part I will show how Signal Dynamic Range and SNR affect ADC choices, and also what happens when the analogue signal re-emerges from a DAC....

Article by: Dr Bill Marshall, RS Components Ltd

More information on RS EDP

EDP-AM-AN16-A info & drivers

Taken from eTech issue 6