I am having trouble with the copper pour function around vias that aren't connected to the pour. As you can see from the attached screenshot, the top four vias have barely any clearance. Indeed I made one of the vias bigger just as a test, and the pour (yes I did re-pour after changing the via) makes no attempt to clear it.
As you can see the vias that are supposed to connect to the pour are cleared properly for the thermal spokes.
Is this a bug?
Let me know if you require any further information to analyse this issue.
I didn't have any problems when I used copper poor in DS PCB V3, however looking around the package in help, search for copper poor and one entry is "Copper poor fill", select this and under the heading "The Pour Copper Dialog" in the bit under "Net name", it states :-
"All copper poured into the area will be on the chosen net. Items within the area on the same layer, but not on this net will be isolated from the copper by a gap. The gap will be the copper spacing for that type of item, defined in the spacing rules. e.g. Copper To Pad spacing." and the "spacing rules" show another table on clearances, so it is worth checking here and trying a few options.
The only other point I recall is you must use "Clear copper" to remove the fill and not try deleting it.
Two options really... one is easier that the other for most.
Play around with the design technology for your board as that stipulates the spacing for tracks etc when running error checking but also works for copper pouring.
Second is to create 'exclusions' by using shapes that are another net (I called it exclusion) and then go back and remove the shapes once done (there might be a way around that - deleting the shape - but haven't delved too much into it myself)