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PCB Stack-up Overview for Intel® Architecture Platforms Layout and Signal Integrity Considerations

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Designing a proper stack-up is critical to achieve the lowest cost and highest reliability PCB design. This is getting increasingly more difficult as high speed digital design is getting more complex. A stack-up refers to the arrangement of the copper and insulating layers that make up a Printed Circuit Board (PCB). The stack-up must consider several job functions to ensure success. A collaborative effort between the layout, signal integrity, hardware engineer and manufacturing (fabrication/assembly) vendor is key to ensuring that all parameters are met and incorporated into the stack-up. It is critical that the stack-up is generated and agreed upon by all parties early in the design phase. This ensures that each discipline knows what the final layout will entail and prevents any issues during the critical layout phase of a design. It is strongly recommended to follow the associated Platform Design Guide (PDG) whenever possible.

http://download.intel.com/design/intarch/papers/321077.pdf

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